87 lines
3.3 KiB
Diff
87 lines
3.3 KiB
Diff
From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
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Date: Thu, 21 Sep 2023 16:15:15 +0200
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Subject: [PATCH 4/5] drm/amd/display: Move the memory allocation out of
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dcn21_validate_bandwidth_fp().
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Origin: https://www.kernel.org/pub/linux/kernel/projects/rt/6.6/older/patches-6.6.7-rt18.tar.xz
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dcn21_validate_bandwidth_fp() is invoked while FPU access has been
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enabled. FPU access requires disabling preemption even on PREEMPT_RT.
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It is not possible to allocate memory with disabled preemption even with
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GFP_ATOMIC on PREEMPT_RT.
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Move the memory allocation before FPU access is enabled.
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Link: https://bugzilla.kernel.org/show_bug.cgi?id=217928
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Link: https://lore.kernel.org/r/20230921141516.520471-5-bigeasy@linutronix.de
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Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
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---
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drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c | 10 +++++++++-
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drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 7 ++-----
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drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.h | 5 ++---
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3 files changed, 13 insertions(+), 9 deletions(-)
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--- a/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
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+++ b/drivers/gpu/drm/amd/display/dc/dcn21/dcn21_resource.c
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@@ -953,9 +953,17 @@ static bool dcn21_validate_bandwidth(str
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bool fast_validate)
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{
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bool voltage_supported;
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+ display_e2e_pipe_params_st *pipes;
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+
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+ pipes = kcalloc(dc->res_pool->pipe_count, sizeof(display_e2e_pipe_params_st), GFP_KERNEL);
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+ if (!pipes)
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+ return false;
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+
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DC_FP_START();
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- voltage_supported = dcn21_validate_bandwidth_fp(dc, context, fast_validate);
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+ voltage_supported = dcn21_validate_bandwidth_fp(dc, context, fast_validate, pipes);
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DC_FP_END();
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+
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+ kfree(pipes);
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return voltage_supported;
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}
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--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
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+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c
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@@ -2203,9 +2203,8 @@ static void dcn21_calculate_wm(struct dc
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&context->bw_ctx.dml, pipes, pipe_cnt);
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}
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-bool dcn21_validate_bandwidth_fp(struct dc *dc,
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- struct dc_state *context,
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- bool fast_validate)
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+bool dcn21_validate_bandwidth_fp(struct dc *dc, struct dc_state *context,
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+ bool fast_validate, display_e2e_pipe_params_st *pipes)
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{
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bool out = false;
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@@ -2214,7 +2213,6 @@ bool dcn21_validate_bandwidth_fp(struct
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int vlevel = 0;
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int pipe_split_from[MAX_PIPES];
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int pipe_cnt = 0;
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- display_e2e_pipe_params_st *pipes = kzalloc(dc->res_pool->pipe_count * sizeof(display_e2e_pipe_params_st), GFP_ATOMIC);
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DC_LOGGER_INIT(dc->ctx->logger);
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BW_VAL_TRACE_COUNT();
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@@ -2254,7 +2252,6 @@ bool dcn21_validate_bandwidth_fp(struct
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out = false;
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validate_out:
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- kfree(pipes);
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BW_VAL_TRACE_FINISH();
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--- a/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.h
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+++ b/drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.h
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@@ -77,9 +77,8 @@ int dcn21_populate_dml_pipes_from_contex
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struct dc_state *context,
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display_e2e_pipe_params_st *pipes,
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bool fast_validate);
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-bool dcn21_validate_bandwidth_fp(struct dc *dc,
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- struct dc_state *context,
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- bool fast_validate);
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+bool dcn21_validate_bandwidth_fp(struct dc *dc, struct dc_state *context, bool
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+ fast_validate, display_e2e_pipe_params_st *pipes);
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void dcn21_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params);
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void dcn21_clk_mgr_set_bw_params_wm_table(struct clk_bw_params *bw_params);
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